Z80 Computer UI

Z80 Backplane Computer

     The 1730 is a Z80 CPU card with a Z84C0008VEC processor and 64kB of SRAM.  This card uses a USB interface to upload code from a hex file into the SRAM and after upload, the SRAM can be copied into the USB controller's 64kB of Flash.  After each power cycle the Flash is copied into the SRAM and when the copy process is complete the bus is released, the Reset# signal is de-asserted and the Z80 is allowed to operate independently of the USB controller.  The Z80 clock can be supplied from a 8MHz crystal oscillator or by the USB controller in a frequency range of DC to 8MHz.

Features:

• All control of the 1730 computer is handled by this UI, including Hex file upload, clock control, SRAM read and write and real time disassembly of running code in slow clock and single step mode.
• IntelHex source files can be loaded, examined and uploaded to the computer, i.e. no separate PROM programming is needed as this computer is completely SRAM based:  Uploading a 64K program can be done in about 20 seconds.
• The debug output from the zDevStudio (SourceForge) assembler can be parsed to generate a listing of the entire program with include files and a symbol map of all defined memory locations and program constants.
• Once loaded in SRAM, the code can be committed to 64K of FLASH memory in the USB controller:  When a valid image is stored in FLASH, at power up the FLASH is copied into SRAM, ready to run.
• The 64K of SRAM can be read before and during code execution: The USB controller can stop the Z80 and use DMA to access the memory after which the code can be re-started where it was halted.

Disassembly:

• See the Z80 Reference Page
• Z80 opcode files to test disassembler logic:  The opcode file has the generic form of every opcode to aid in programming the disassembler and test vector file has every possible opcode plus the expected assembly code.  The UI to control the Z80 computer below uses this code to disassemble the monitored bus in real-time.  Buttons on the COMM tab process the test vector file to test the disassembler logic.
• LCD Display Trace, LCD Display Listing and Real time disassembly with breakpoint (which also shows the entire upload sequence from scratch) for the LCD test program.  This program initializes the display and then writes ASCII to it.  Since it was running at 10Hz for the trace, all the delays were shortened to the absolute minimum.